Journal of Semiconductor Technology and Science (JSTS)
Conventional radio-frequency Power Amplifiers (PAs) operating with wideband signals, such as that of Wideband Code Division Multiple Access (WCDMA) and Wireless Local Area Network (WLAN), require high linearity due to spectral efficiency provided. In a wireless communications system, a pre-distorter is often used to compensate for the non-linear distortions that result from operating a power amplifier near the saturation region, thereby improving system performance and increasing the spectral efficiency for the communication channels. This paper presents a new VLSI design for the polynomial Digital Pre-Distorter (DPD). The proposed DPD uses a CO-ordinate Rotation DIgital Computing (CORDIC) processor and a PD process with a fully pipelined architecture.