University of Florence
The design and evaluation of microprocessor architectures is a difficult and time-consuming task. Although small, hand-coded micro-benchmarks can be used to accelerate performance evaluation, these programs lack the complexity to stress increasingly complex architecture designs. Larger and more complex real-world workloads should be employed to measure the performance of a given design or to evaluate the efficiency of various design alternatives. These applications can take days or weeks if run to completion on a detailed architecture simulator.