One of the problems with ever-scaling process technology is leakage consumption. Leakage consumption of on-chip memory components (e.g., caches) is particularly problematic since these components typically occupy a significant portion of die area. Prior research that addresses leakage consumption of on-chip memory components have exclusively focused on caches. However, recent trends in embedded computing systems indicate that software-managed Scratch-Pad Memories (SPMs) are being increasingly employed in embedded devices accommodate SPMs. This paper tries proposes a compiler-based solution for reducing leakage energy consumption of SPMs.