Provided by: Hindawi Publishing
In this paper, the authors describe the design of an All-Digital Phase Locked Loop (AD-PLL) for wireless applications in the WiMAX 3.3 - 3.8GHz bandwidth. The Time/Digital Converter (TDC) sets the in-band noise and it may be responsible for the presence of spurious tones at the PLL output. The TDC is implemented as a Delay-Locked Loop (DLL) to be insensitive to process spreads and it uses a lead-lag phase detector and a digital loop filter to further take advantage of the digital approach. The most important source of spurs is identified in the time skew between counter and TDC in the PLL.