Adiabatic Improved Efficient Charge Recovery Logic for Low Power CMOS Logic

Provided by: International Journal of Engineering Innovations and Research (IJEIR)
Topic: Hardware
Format: PDF
Power dissipation becoming a limiting factor in VLSI circuits and systems. Due to relatively high complexity of VLSI systems used in various applications, the power dissipation in CMOS inverter arises from its switching activity, which is mainly influenced by the supply voltage and effective capacitance. The low-power requirements of present electronic systems have challenged the scientific research towards the study of technological, architectural and circuital solutions that allow a reduction of the energy dissipated by an electronic circuit.

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