Provided by: WSEAS
Date Added: Jul 2012
In this paper, the authors present advanced hardware architecture for integer transform, quantization, inverse quantization and inverse integer transform modules dedicated to the macroblock engine of the H.264/AVC video codec standard. Their highly parallel and pipelined architecture is designed to be used for intra and inter prediction modes in H.264/AVC. The TQ/IQT (Transform and Quantization/Inverse Quantization and Transform) design is described in VHDL language and synthesized to Altera Stratix II FPGA and to TSMC 0.18um standard-cells.