International Association of Computer Science & Information Technology (IACSIT)
Cache ways are fixed in traditional caches. This paper proposes an algorithm to have variable number of ways in set associative caches. The cache is assumed to be fast registers. A free register to a set is allocated on cold miss. The least recently used policy is used to replace a way in case of no free registers. This algorithm results in variable number of ways for mapped sets. Simulations were performed with SPEC2K benchmarks on the proposed model. An improvement of 3% is seen in average memory access time.