An Approach to Improve Accuracy of Source-Level TLMs of Embedded Software

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Provided by: European Design and Automation Association
Topic: Hardware
Format: PDF
Virtual Prototypes (VPs) based on Transaction Level Models (TLMs) have become a de-facto standard for design space exploration and validation of complex software-centric multicore or multiprocessor systems. The most popular method to get timed software TLMs is to annotate timing information at the basic-block level granularity back into application source code, called Source Code Instrumentation (SCI). The existing SCI approaches realize the back-annotation of timing information based on mapping between source code and binary code.
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