An Area and Power Efficient on Chip Communication Architectures for Image Encryption and Decryption

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Provided by: eSAT Publishing House
Topic: Hardware
Format: PDF
The design of new electronic systems is getting more complex as more functionality is integrated into these systems. To design complex system, a predictable design flow is needed. A soft processor based System-on-Chip (SoC) is often mentioned as the hardware platform to be used in modern electronics systems for fast prototyping on FPGA. In this paper, a novel area and power efficient on chip communication architectures has been proposed for image encryption and decryption using single soft processor (micro blaze). Proposed system on chip explores on chip communication architectures features to efficiently implement the application.
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