An Automated Flow to Map Throughput Constrained Applications to a MPSoC

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Provided by: Creative Commons
Topic: Hardware
Format: PDF
In this paper, the authors describe a design flow to map throughput constrained applications on a Multi-Processor System-on-Chip (MPSoC). It integrates several state-of-the-art mapping and synthesis tools into an automated tool flow. This flow takes as input a throughput constrained application, modeled with a synchronous dataflow graph, a C-based implementation for each actor in the graph, and a template based architecture description. Using these inputs, the tool flow generates an MPSoC platform tailored to the application requirements and it subsequently maps the application to this platform.
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