An Efficient Approach of Coprocessor Design Using RR4 Algorithm

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Provided by: International Journal of Multidisciplinary Research and Development (IJMRD)
Topic: Hardware
Format: PDF
In the proposed paper, the authors have first designed a RR4 multiplier and compared the results in terms of no. of gates and power consumption, finally compared the results with the conventional multiplier and redundant binary radix-4 multiplier, they found their proposed RR4 based scheme has greater efficiency with all aspects of result. Subsequently, they have extended their work in designing 8-bit arithmetic coprocessor with the help of redundant radix-4 arithmetic number system. This co-processor is supposed to work on a simple parallel quaternary multiplication algorithm which is the fastest known in the domain of parallel computing.
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