Memory Built-In Self-Test (MBIST) has become a standard engineering practice. Its excellence is mainly determined by its fault detection capacity in relationship to the area overhead. In the world of MBIST, memory accesses have to be applied at-speed, using back-to-back memory cycles. Systems require large, high speed memories, while current technology exhibits a large spread in implementation parameters, resulting in speed-related faults. Their detection is mandatory in today's industry and requires non-linear algorithms such as gal pat, gal row and gal column, and a special address generator.