An Efficient Low Power 3T XOR Cell
The eXclusive-OR (XOR) function is the fundamental unit in various circuits, such as comparator, parity checker, full adder, multiplier and so on. This paper presents a XOR cell that can be implemented in CMOS technology. The design has been compared with existing 3T XOR cell and found a significant improvement in power consumption, power-delay product, noise immunity and parasitic capacitances. The pre layout simulation has been carried out on Tanner EDA tool on BSIM3v3 45nm technology and post layout simulation on 0.5submicron technology.