Association for Computing Machinery
In recent years, there has been increasing interest on using task-level pipelining to accelerate the overall execution of applications mainly consisting of producer-consumer tasks. This paper proposes an approach to achieve pipelining execution of producer-consumer pairs of tasks in FPGA-based multi-core architectures. The authors' approach is able to speed up the overall execution of successive, data-dependent tasks, by using multiple cores and specific customization features pro-vided by FPGAs. An important component of their approach is the use of customized inter-stage buffer schemes to communicate data and to synchronize the cores associated to the producer-consumer tasks.