An FPGA-Based Object Detector With Dynamic Workload Balancing

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Provided by: Institute of Electrical & Electronic Engineers
Topic: Hardware
Format: PDF
In recent years, object detection has been more frequently integrated with other vision processing functions, acting for acquisition of region of interest and is widely adopted in portable devices such as digital camera capable for automatic focusing on faces. In applications targeting those devices, limitations in both hardware resources and power supply mean an efficient utilization of hardware resource is of significance. In this paper a novel hardware architecture for Viola and Jones object detectior is proposed.
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