An FPGA for a Multibank Memory-Based VLSI Architecture of DVB symbol Deinterleaver

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Provided by: International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering (IJAREEIE)
Topic: Hardware
Format: PDF
Efficient symbol-deinterleaver architecture compliant with the Digital-Video-Broadcasting (DVB) standard is proposed. By partitioning the entire symbol buffer into four separate parts with a special low-conflict access control strategy, the symbol deinterleaver can be implemented with four-bank single-port on-chip memory blocks with slight overhead. By this the authors can save hardware cost very much compared with the conventional double-buffer approach. In addition, they can also use a look head online circuit of a symbol permutation-address generator, which provides required permutation addresses every cycle to avoid either the use of a lookup table or an extra temporary buffer.
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