An On-Chip Clock Jitter Fault Detection Circuit for System-on-Chip Application

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Provided by: AICIT
Topic: Hardware
Format: PDF
Clock jitter has become a problem for integrating IP cores and peripheral devices into a single synchronous SoC. In this paper, the authors propose an on-chip clock jitter detect circuit to enhance design flexibility, which only consists of twelve transistors and two minor capacitors. The proposed circuit transforms the clock jitter error to deviation of voltage (TVC) but has no use of constant current source and Analog-to-Digital Converter (ADC). It is more convenient in contrast with the conservative clock fault detection structure methodology and is easy to be integrated in to SoC applications.
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