University of Nigeria
The electronics industry has entered the era of multi-million-gate chips, and thereXs no turning back. This technology promises new levels of integration on a single chip, called the System-on-a-Chip (SoC) design, but also presents significant challenges to the chip designer. Processing cores on a single chip, may number well into the high tens within the next decade, given the current rate of advancements, Interconnection networks in such an environment are, therefore, becoming more and more important. Currently, on-chip interconnection networks are mostly implemented using buses.