International Journal of Engineering Sciences & Research Technology (IJESRT)
In this paper, the authors propose an improved version of lifting based 2D Discrete Wavelet Transform (DWT) VLSI architecture. In this paper, high-efficient lifting-based architecture for the 5/3 Discrete Wavelet Transform (DWT) is presented. In this architecture, all multiplications are performed using less shifts and additions. The Discrete Wavelet Transform (DWT) is based on time-scale representation. It provides efficient multi-resolution. DWT is implemented by convolution method. For such an implementation it requires a large number of computations and a large storage features that are not suitable for either high-speed or low-power applications. Hence for a high speed lifting based 2D (DWT) VLSI architecture is available.