Analysis and Mitigation of Phase Noise and Sampling Jitter in OFDM Radio Receivers
This paper addresses the analysis and Digital Signal Processing (DSP)-based mitigation of phase noise and sampling clock jitter in Orthogonal Frequency Division Multiplexing (OFDM) radios. In the phase noise studies, the basic direct-conversion receiver architecture case is assumed with noisy down-converting oscillator. In the sampling jitter case, on the other hand, the so-called direct-radio-frequency-sampling receiver architecture is deployed utilizing band-pass sub-sampling principle. The basis for the DSP-based impairment mitigation techniques is first formed using analytical receiver modeling with incoming OFDM waveform, where the effects of both oscillator phase noise and sampling clock jitter are mapped to certain type subcarrier cross-talk and distortion compared to ideal receiver case.