Analysis of Cross-layer Vulnerability to Variations: An Adaptive Instruction-level to Task-level Approach

Provided by: University of California
Topic: Hardware
Format: PDF
Variation in performance and power across manufactured parts and their operating conditions is an accepted reality in aggressive CMOS (Complementary Metal-Oxide-Semiconductor) processes. This paper considers challenges and opportunities in identifying this variation and methods to combat or even use these variations for improved computing systems. The authors introduce the notion of Instruction-Level Vulnerability (ILV) and Concurrent Instruction Reuse (CIR) to expose variation and its effects to the software stack for use in architectural and runtime optimizations.

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