Analysis of Leakage Reduction Technique on Different SRAM Cells
Leakage components is very important for estimation and reduction of leakage power, especially for low power applications. This provides the motivation to explore the design of low leakage SRAM cells. High leakage currents in deep submicron regimes are becoming a major contributor to total power dissipation of CMOS circuits as the threshold voltage, channel length and gate oxide thickness are scaled. Memory leakage suppression is critically important for the success of power-efficient designs, especially for ultra-low power applications. As the channel length of the MOSFET reduces, the leakage current in the SRAM increases.