Analytical Model for SRAM Dynamic Write-ability Degradation due to Gate Oxide Breakdown

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Provided by: edaa
Topic: Storage
Format: PDF
Progressive gate oxide breakdown is emerging as one of the most important source of stability degradation in nanoscale SRAMs, especially at lower supply voltages. Low voltage operation of SRAM arrays is critical in reducing the power consumption of embedded microprocessors, thus necessitating the lowering of Vmin. However, the oxide breakdown undesirably increases Vmin due to increase in dynamic write failures and eventually static write failures as the supply voltage decreases. In this paper, the authors describe an analytical model based on the Kohlrausch-William-Watts (KWW) function to predict the degradation in the WLcrit as the oxide breakdown increases.
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