Application of Galois Field in VLSI Using Multi-Valued Logic

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Provided by: International Journal of Engineering, Science and Innovative Technology (IJESIT)
Topic: Hardware
Format: PDF
Multi-valued logic is an apparent extension of binary logic where any proposition can have more than 2 values. Interconnections play a crucial role in deep sub-micron designs because they dominate the power and area. Design of the binary logic circuits is limited by the requirement of the interconnections. In modern SoC design, the interconnection is becoming a major problem because of the bus width. This problem can be solved by using multiple-valued logic inter-connection. The benefits of multivalued logic is such as reduced area due to signal routing reduction along with the important advantage of being able to easily interface with traditional binary logic circuits.
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