Application Specific Memory Access, Reuse and Reordering for SDRAM

Provided by: Imperial College London
Topic: Storage
Format: PDF
The efficient use of bandwidth available on an external SDRAM interface is strongly dependent on the sequence of addresses requested. The On-chip memory buffers can make possible data reuse and request reordering which together ensure bandwidth on an SDRAM interface is used efficiently. This paper outlines an automated procedure for generating an application-specific memory hierarchy which exploits reuse and reordering and quantifies the impact this has on memory bandwidth over a range of representative benchmarks.

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