Architecture Design and FPGA Implementation of an FFT Based Reactive Power Meter
Novel methods of reactive power measurement are drawing the attention of modern power system engineers due to the challenges in providing accuracy. Reactive power measurement is increasingly paid attention by power industry. A novel architecture to measure the reactive power is proposed in this paper. Architecture is described in Verilog and implemented using Xilinx ISE 13.1i. In this paper, voltage and current signals in time domain are converted to the frequency domain and power on each component is calculated to obtain the total reactive power.