Area Efficient Design Analysis of Carry Look Ahead Adder

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Provided by: International Journal of Computer Applications
Topic: Hardware
Format: PDF
In this paper, the authors provide a low power solution for very large scale integration. Power consumption of a circuit and its area occupied are major constraints for a VLSI designer. So, in this paper they focused mainly on these two parameters by using different design methodologies such as fully automatic, semi-custom and fully custom. Addition is basic operation in any system, but it requires more time as the number of bits are increased. So, they use carry look-ahead adder to reduce the processing time in circuits like processors or any other circuit.
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