AsAP: An Asynchronous Array of Simple Processors

Provided by: Institute of Electrical & Electronic Engineers
Topic: Hardware
Format: PDF
An array of simple programmable processors is implemented in 0.18 m CMOS and contains 36 asynchronously clocked independent processors. Each processor occupies 0.66 mm2 and is fully functional at a clock rate of 520 - 540 MHz at 1.8 V and over 600 MHz at 2.0 V. Processors dissipate an average of 32 mW under typical conditions at 1.8 V and 475 MHz, and 2.4 mW at 0.9 V and 116 MHz while executing applications such as a JPEG encoder core and a fully compliant IEEE 802.11a/g wireless LAN baseband transmitter.

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