ASPA: Focal Plane Digital Processor Array With Asynchronous Processing Capabilities

Provided by: Institute of Electrical & Electronic Engineers
Topic: Hardware
Format: PDF
In this paper, the authors present implementation and experimental results for a digital vision chip that operates in mixed asynchronous/synchronous mode. Mixed configuration benefits from full programmability (discrete-time mode) and high operational performance in global image processing operations (continuous-time mode) thus extending the application field of smart sensors from low-to medium-level processing. A 19x22 proof-of-concept chip was fabricated and tested. At peak operational frequency (150MHz) each cell provides 9.6 MOPS thus achieving area utilization 820.8 MOPS/mm2 and power efficiency 29 GOPS/W.

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