University of Teramo
In this paper, the authors propose a method for automated di/dt stressmark generation to test maximum voltage droop in a microprocessor power delivery network. The di/dt stressmark is an instruction sequence which draws periodic high and low current pulses that maximize voltage fluctuations including voltage droops. In order to automate di/dt stressmark generation, they devise a code generator with the ability to control instruction sequencing, register assignments, and dependencies. Their framework uses a Genetic Algorithm in scheduling and optimizing candidate instruction sequences to create a maximum voltage droop.