Automated Optimization of Look-Up-Table Implementation for Function Evaluation on FPGAs

Download Now
Provided by: Duke University
Topic: Hardware
Format: PDF
In this paper, the authors present a systematic approach for automatic generation of Look-Up-Table (LUT) for function evaluations and minimization in hardware resource on Field Programmable Gate Arrays (FPGAs). The class of functions supported by this approach includes sine, cosine, exponentials, Gaussians, the central B-splines, and certain cylinder functions that are frequently used in applications for signal and image processing and data processing. In order to meet customer requirements in accuracy and speed as well as constraints on the use of area and on-chip memory, the function evaluation is based on numerical approximation with Taylor polynomials.
Download Now

Find By Topic