Institute of Electrical & Electronic Engineers
The authors address performance maximization of independent task sets under energy constraint on Chip Multi-Processor (CMP) architectures that support multiple voltage/frequency operating states for each core. They prove that the problem is strongly NP-hard. They propose polynomial time 2-approximation algorithms for homogeneous and heterogeneous CMPs. To the best of their knowledge, their techniques offer the tightest bounds for energy constrained design on CMP architectures. Experimental results demonstrate that their techniques are effective and efficient under various workloads on several CMP architectures.