Automatic Data Path Extraction in Large-Scale Register-Transfer Level Designs

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Provided by: The University of Maine at Machias
Topic: Big Data
Format: PDF
Extracting data paths in large-scale register transfer level designs has important usage in automatic verification of synchronous circuits and synthesis of asynchronous circuits. Current tools rely on users to provide the data/control partition or use state-space analyses to extract data paths. Due to the explosion of state-space, the latter method can be used in only small designs. To resolve this problem, a graphic search and trim method, which can extract data paths in large scale designs, is presented.
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