European Design and Automation Association
Early architectural exploration and design validation are becoming increasingly important for Multi-Processor Systems-on-Chip (MPSoC) designs. Native functional simulations can provide orders of magnitude in speedup over cycle or instruction level simulations but often require dedicated maintenance. In this paper, the authors present a tool called NATIVESIM to automatically generate the functional models for embedded processor extensions. They provide a mechanism to address the challenge of modeling a subset of the processor architecture, with no visibility to the rest of the processor.