Automation of IP Core Interface Generation for Reconfigurable Computing

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Provided by: University of California, Los Angeles (Anderson)
Topic: Hardware
Format: PDF
Pre-designed IP cores for FPGAs represent a huge intellectual and financial wealth that must be leveraged by any high-level tool targeting reconfigurable platforms. In this paper, the authors describe a technique that automates the generation of IP core interfaces allowing these to be used as C functions transparently from within C source codes using a reconfigurable computing compiler. They also show how this same tool can be used to support run-time reconfiguration on FPGAs by generating a common wrapper that interfaces to multiple cores.
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