Bank-Aware Dynamic Cache Partitioning for Multicore Architectures

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Provided by: IBM
Topic: Hardware
Format: PDF
As Chip Multi-Processor systems (CMP) have become the predominant topology for leading microprocessors, critical components of the system are now integrated on a single chip. This paper enables sharing of computation resources that was not previously possible. In addition, the virtualization of these computational resources exposes the system to a mix of diverse and competing workloads. Cache is a resource of primary concern as it can be dominant in controlling overall throughput. In order to prevent destructive interference between divergent workloads, the last level of cache must be partitioned.
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