BER-Based Power Budget Evaluation for Optical Interconnect Topologies in NoCs
Optical interconnect technology using silicon photonics has emerged as a viable solution for high-speed, energy-efficient communication between clusters of cores (for inter-cluster data transfer) in Network-on-Chips (NoCs). In recent years, several investigations have been carried out on the candidate topologies for optical interconnects (silicon-on-silica waveguides) in NoCs. This paper analyzes Bit-Error-Rate (BER) performance of various optical network-on-chip topologies, taking into account signal losses and crosstalk components along the signal paths. A novel optical interconnect topology, using multiple-segment buses, is proposed which offers an encouraging BER performance within the acceptable limit of per-wavelength launched power (1.5mW).