Memory built-in self-test has become a standard industrial practice. Its feature is mainly determined by its fault detection capability in combination with its required area transparency. Address generators have a significant contribution to the area transparency. Previously published schemes have proposed the address generator implementations based on counter modules. In this paper the authors present an ALU-based address generator implementation; the proposed scheme present lower hardware overhead compared to the previously proposed one, provided the availability of the ALU or the counter in the circuit.