Building a Fast SDRAM Controller with Ping Pong FIFO's for AHB Interface

Provided by: IRD India
Topic: Hardware
Format: PDF
Fifty years of development have resulted in a spectacular increase in the performance of processors and an equally spectacular reduction in their cost in terms of latency. Today's issue is the speed of fetching data from memories is unable to cope up with speed of processors hence fast memory controllers are needed that eventually increases memory efficiency. Memory controller is responsible to match speed of processor and memory one and the other side, so as to enable seamless communication. In this paper, the authors are proposing and building a memory controller which is specifically targeted for SDRAM and is designed compatible with Advanced High-performance Bus (AHB) which is a new generation of AMBA bus.

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