Cache Miss Characterization in Hierarchical Large-Scale Cache-Coherent Systems

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Provided by: Universidad de Malaga
Topic: Hardware
Format: PDF
There is a growing trend towards developing large-scale cache-coherent systems by using commodity symmetric multiprocessors, which requires to extend their coherence protocol. In such systems, cache coherence transactions issued due to cache misses traverse interconnection networks with very different topologies and latencies. In this paper, the authors perform a cache miss characterization aimed at analyzing the benefits that can be expected for a specialized coherence controller able to locally resolve cache misses, thus saving traffic across long-latency links.
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