With the fast development of semiconductor technology, multi-core processors have gradually replaced single-core processors. The demand of cache is also increasing. Cache, as the most important component of the architecture, occupies the most of the chip's area. It is also the main source of power consumption. If one were to reconstruct the Cache configuration according to the character of the currently running program the architecture would, in result, have a better power consumption. The multi-core dynamic reconfigurable cache, according to the procedures in the runtime system resource requirements of the program, is able to select the lowest power cache architecture automatically.