Provided by: Creative Commons
Date Added: Oct 2013
Power consumption has become a critical and important concern in both high performance and portable applications. From last many years the authors are scaling down the CMOS devices to achieve the better performance in terms of speed, power dissipation, size and reliability, so the scaling of CMOS is done to attain high speed and decrease size of memory i.e. SRAM. Due to scaling of device they are facing new challenges day by day like oxide thickness fluctuation, intrinsic parameter fluctuation. This paper represents the simulation of different SRAM cells and their comparative analysis on different parameters such as power supply voltage, area efficiency etc. to enhance the performance.