Carbon: Architectural Support for Fine-Grained Parallelism on Chip Multiprocessors

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Provided by: Association for Computing Machinery
Topic: Hardware
Format: PDF
Chip Multi-Processors (CMPs) are now commonplace, and the number of cores on a CMP are likely to grow steadily. However, in order to harness the additional compute resources of a CMP, applications must expose their thread-level parallelism to the hardware. One common approach to doing this is to decompose a program into parallel \"Tasks\" and allow an underlying software layer to schedule these tasks to different threads. Software task scheduling can provide good parallel performance as long as tasks are large compared to the software overheads.
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