CMOS Dynamic Low Pass Filter for a Low Noise Level and a Fast Response Time of PLL System

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Provided by: International Journal of Electronics and Computer Science Engineering
Topic: Hardware
Format: PDF
The authors present in this paper, a new model of a Low Pass Filter (LPF) for a Phase-Locked Loop (PLL) systems. The main characteristic of this CMOS LPF structure is its dynamic band-width (about 12.66kHz when the PLL is locked and 211. 30kHz during the tracking). It ensures a fast response time, a suppression of the jitters and a better noise level at the output. This LPF polarization is ensured by the current from the PFC-IC (Phase-Frequency Comparator with Charge Impulse) and the VCO control voltage. The simulation in a PLL system gives them a response time of 35.4μs and a phase noise level of 121.37dBc.
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