Code Generation for Process Network Models onto Parallel Architectures

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Provided by: University of Calgary
Topic: Hardware
Format: PDF
With multi-core and many-core architectures becoming the current focus of research and development, and as vast varieties of architectures and programming models emerging in research, the design space for applications is becoming enormous. From the number of cores, the memory hierarchy, the interconnect to even the programming model and language used are all design choices that need to be optimized for applications in order to fully benefit from parallel architectures. The authors propose a code generation framework targeting rapid design space exploration and prototyping.
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