Comparison of Conventional Multiplier with Bypass Zero Multiplier

Provided by: International Journal of Engineering Development and Research (IJEDR)
Topic: Hardware
Format: PDF
Low power is one of the most important designing factors in today's VLSI design market because the authors need to meet the Moore's law and as per customers' requirements so they can either reduce static or dynamic power. So basically here in this paper, dynamic power reduction is performed on the multiplication circuit because multiplier is one of the most important circuits of many important digital circuits so power reduction of this is one of the important parameter to concern these days.

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