Comparitive Analysis of Power Optimization Using Mtcmos, Transistor Sizing & Combined Technique on 180nm Technology
In this paper, the authors use various techniques for low power optimization and with the help of these techniques they perform comparative analysis. Evolution in VLSI continuously reduces the silicon technology to fulfill the increasing demands for higher functionality, low power and better performance at low cost. In today's scenario, low power design becomes an important issue. Most of the power consumption takes place during switching events i.e. dynamic power. This paper present various basic circuit in which reduction in power consumption takes place due to transistor sizing as well as MTCMOS technique separately and then they will also design the same circuit by the combination of the above two techniques which consume overall less power than conventional CMOS circuitry.