Provided by: Reed Business Information
Date Added: Jul 2013
Efficient, flexible, and high performance chips are needed. Many performance-critical applications (e.g. digital video processing, telecoms, and security applications) that need to process huge amounts of data in a short time would benefit from these attributes. The mapping process of high performance embedded applications to today's Multi-Processor System-on-Chip (MPSoC) devices suffers from a complex tool-chain and programming process. The problem is the expression of parallelism with a pure imperative programming language, which is commonly C. This traditional approach limits the mapping, partitioning and the generation of optimized parallel code, and consequently the achievable performance and power consumption of applications from different domains.