Concepts, Architectures, and Run-time Systems for Efficient and Adaptive Reconfigurable Processors

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Provided by: Institute of Electrical & Electronic Engineers
Topic: Hardware
Format: PDF
In this paper, the authors describe an approach that allows using the potential of reconfigurable processors in an efficient and adaptive manner. Some architectural design decisions (e.g., the provided memory interface, number of ports, and bit-width per port) have a strong impact on the efficiency, whereas other design decisions (e.g., how the reconfigurable fabric is used to implement application-specific accelerators) have an impact on the adaptively that the reconfigurable processor can provide. Therefore, they will present and discuss different design decision alternatives for reconfigurable processor architectures.
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