Concurrency Emulation and Analysis of Parallel Applications for Multi-Processor System-on-Chip Co-Design

Provided by: Association for Computing Machinery
Topic: Hardware
Format: PDF
In this paper, the authors present a novel technique for the modeling and the simulation of parallel applications for Multi-Processor Systems-on-Chip (MPSoCs). This technique consists of an application-transparent emulation of OS primitives, including task creation, scheduling, synchronization etc.; this emulation guarantees compatibility with any program compiled against the standard POSIX library, independently of the target OS. This methodology can be used to perform initial HW/SW partitioning and concurrent engineering of a given application, as it allows any software routine to be transparently emulated with SystemC modules.

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